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Rapidus is a leading innovator in cutting-edge digital chip design. We are looking for a talented and experienced Digital Chip Design Engineer to join our team, focusing on Standard Cell Development and Design Technology Co-Optimization (DTCO). In this role, you will be instrumental in enabling high-performance and low-power digital chips for our next-generation products, by driving the convergence of library design and process technology. You will have the opportunity to work with state-of-the-art technology in a global environment, actively contributing to our advanced product development. Key Responsibilities: - Design, evaluate, and optimize standard cell libraries for advanced technology nodes. - Plan and execute DTCO (Design Technology Co-Optimization) activities, strengthening the collaboration between circuit design and process technology to achieve optimal PPA (Power, Performance, Area) targets. - Develop and improve custom layout, characterization, and verification flows. - Design with a keen understanding of design rules, process variations, and reliability requirements. - Collaborate closely with design teams, process and device development teams, and EDA teams. - Evaluate and introduce new design methodologies and tools to meet PPA goals. - Engage in technical discussions and collaborations with IP vendors and EDA venders. - Document and maintain design data. 事業内容・業種 半導体

Rapidus is a leading innovator in semiconductor design and manufacturing. We’re dedicated to developing cutting-edge EDA (Electronic Design Automation) flows to achieve efficient and high-quality chip designs. We’re currently seeking a talented Chip Implementation EDA Flow Development Engineer to help us elevate our design efficiency and productivity to the next level. In this pivotal role, you’ll be involved in a wide range of activities, from building state-of-the-art sign-off flows for the latest technology nodes to integrating CAD platforms and developing EDA solutions for all kinds of design challenges. You’ll work closely with our design teams, leveraging the most advanced EDA tools and methodologies to accelerate our chip development. Key Responsibilities As a Chip Implementation EDA Flow Development Engineer, your responsibilities will include: - Chip Implementation EDA Flow Enablement: - Sign-Off Flow Development: Develop and optimize sign-off flows for RC extraction, timing analysis, and timing fixing. This ensures the performance and reliability of our chips. - EDA Platform Development: Develop and maintain our EDA platform for integrating design stages, managing design kits, and overseeing design databases. You’ll build an environment where designers can work efficiently. - General CAD/EDA Development: Develop and improve general EDA tools to resolve all sorts of design issues. This will help eliminate bottlenecks in the design process and boost efficiency. - Collaborate with design teams to identify flow and tool needs and define requirements. - Work with EDA vendors to introduce new features and optimize existing tools. - Provide support for implementing developed flows and tools, offering user assistance and troubleshooting. - Stay up-to-date with the latest EDA technologies and industry trends, evaluating their applicability to our internal flows. Create and maintain documentation for developed flows and tools. 事業内容・業種 半導体

Key Responsibilities As a Test Chip Design Engineer, your responsibilities will include: - Test Chip Physical Design and PPA Analysis: - Backend (BE) Implementation and Related Flow Development: Drive the full backend implementation flow, from chip-level planning and PG (Power/Ground) network design to floorplan, place, CTS (Clock Tree Synthesis), route, power analysis (PDNA sign-off), and comprehensive physical verification. - Design Methodology and EDA Tool Utility Development: Develop and enhance design methodologies and associated EDA tool utilities specifically for backend implementation. This includes creating solutions for challenges arising from new process technologies and developing utilities to support our customers effectively. - Technology Benchmark: Conduct detailed technology benchmarking to thoroughly understand and evaluate the PPA characteristics of new process technologies. - Collaborate closely with process development teams, circuit design teams, and EDA vendors to define and implement robust design flows. - Analyze and debug complex physical design issues, including timing, power, and physical verification failures. - Contribute to the continuous improvement of design processes and methodologies. - Document design specifications, methodologies, and results clearly and concisely. 事業内容・業種 半導体